Update & Notes The original notes on the CD32 epxnasion port were released in 1995, they left out a few pins, which I have added. there is built in support (I think) for a 68030 processor on this expnasion connector, previously these signals were marked as no connect (n/c). The mating connector is a 182 way MCA connector which is possible to obtain.
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## CD32 Expansion port info. 1994-07-05 by Anders Stenkvist ##
## Updated 19th April 2002 by Ian Stedman ##
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2 84___86 182
|--- TOP
//////////////////////////// //////////////////////////// v
/==========================/ /==========================/
^ ^ ^ ^ ^
1 83 85 181 |___ BOT
Note DGND = digital GND
VCC = +5V
A * after a signal denotes active low.
Pin # Name Comment
===========================================================================
Pin 1 A31 Probably not connected since 68EC020
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Pin 8 A24 Probably not connected since 68EC020
Pin 9 DGND
Pin 10 VCC
Pin 11 A23 Address bus
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Pin 18 A16 |
Pin 19 DGND
Pin 20 VCC
Pin 21 A15 |
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Pin 28 A8 |
Pin 29 DGND
Pin 30 VCC
Pin 31 A7 |
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Pin 38 A0 Address bus
Pin 39 DGND
Pin 40 VCC
Pin 41 D31 Data bus
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Pin 48 D24 |
Pin 49 DGND
Pin 50 VCC
Pin 51 D23 |
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Pin 58 D16 |
Pin 59 DGND
Pin 60 VCC
Pin 61 D15 |
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Pin 68 D8 |
Pin 69 DGND
Pin 70 VCC
Pin 71 D7 |
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Pin 78 D0 Data bus
Pin 79 DGND
Pin 80 VCC
Pin 81 IPL2* Interrupt Priority Level 2 (68020 signal)
Pin 82 IPL1* |
Pin 83 IPL0* Interrupt Priority Level 0
Pin 84 IPEND Interrupt pending
Pin 85 RST Request to send (RS232 port)
Pin 86 HALT* Processor Halt
Pin 87 ECS* Not implemented on 68EC020 (68030 signal)
Pin 88 OCS* Not implemented on 68EC020 (68030 signal)
Pin 89 SIZE1 Indicates number of bytes remaining to transfer
Pin 90 SIZE0 Indicates number of bytes remaining to transfer
Pin 91 AS* Adress strobe
Pin 92 DS* Data strobe
Pin 93 R/W* Read/Write
Pin 94 BERR* Bus Error
Pin 95 STERM* 68030 STERM (reserved)
Pin 96 AVEC* Autovector request during interrupt acknowledge
Pin 97 DSACK1* Data transfer and size acknowledge
Pin 98 DSACK0* Data transfer and size acknowledge
Pin 99 CPUCLK_A CPU Clock 14 MHz
Pin100 E Peripheral Enable Clock
Pin101 DGND
Pin102 VCC
Pin103 FC2 Function codes
Pin104 FC1 Function codes
Pin105 FC0 Function codes
Pin106 RMC* Read Modify cycle
Pin107 CIIN* 68030 CIIN (Reserved)
Pin108 CIOUT* 68030 CIOUT (Reserved)
Pin109 CBREQ* 68030 CBREQ (reserved)
Pin110 CBACK* 68030 CBACK (Reserved)
Pin111 CPU_BR* CPU bus request
Pin112 EXP_BG* Expansion bus grant
Pin113 CPU_BG* CPU bus grant
Pin114 EXP_BR* Expansion bus request
Pin115 CPU_BGACK* CPU bus grant Acknowledge
Pin116 EXP_BGACK* Expansion bus acknowledge
Pin117 PUNT* Back off signal to console
Pin118 RESET* General RESET
Pin119 INT2* Generate a level 2 interrupt
Pin120 INT6* Generate a level 6 interrupt
Pin121 KB_CLOCK* Keybord clock
Pin122 KB_DATA* Keybord data
Pin123 FIRE0* Fire buttons
Pin124 FIRE1* |
Pin125 LED* Power On Led
Pin126 ACTIVE* CD Drive active led
Pin127 RXD* Serial data in
Pin128 TXD* Serial data out
Pin129 DKRD* Disk Read Data
Pin130 DKWD* Disk Write Data
Pin131 SYSTEM (Reserved)
Pin132 DKWE* Disk Write Enable
Pin133 CONFIG_OUT* Zorro config signal
Pin134 CONFIG_IN* Zorro config signal
Pin135 DGND
Pin136 +12V
Pin137 DGND
Pin138 +12
Pin139 17MHZ CD-Drive/CD-DAC clock
Pin140 EXT_AUDIO* External audio enable
Pin141 DA_DATA CD-Data
Pin142 MUTE* Audio mute signal
Pin143 DA_LRCLK CD-Data Left Right clock
Pin144 DA_BCLK CD-Data bit clock
Pin145 DGND
Pin146 VCC
Pin147 DR Digital Red
Pin148 DG Digital Green
Pin149 DB Digital Blue
Pin150 DI Digital Intensity
Pin151 PIXELSW_EXT* External genlock pixel switch (Video)
Pin152 PIXELSW* Genlock Pixel Switch (Video)
Pin153 BLANK* Video blanking signal
Pin154 PIXELCLK Pixelclock for manipulating RBG data
Pin155 DGND
Pin156 VCC
Pin157 CSYNC* Composite sync
Pin158 CCK_B Color clock ?????
Pin159 HSYNC* Horizontal sync
Pin160 VSYNC* Vertical sync
Pin161 VGND Video ground
Pin162 VGND Video ground
Pin163 AR_EXT External Analog Red
Pin164 AR Analog Red
Pin165 AG_EXT External Analog Green
Pin166 AG Analog Green
Pin167 AB_EXT External Analog Blue
Pin168 AB Analog Blue
Pin169 VGND Video ground
Pin170 VGND Video ground
Pin171 NTSC* NTSC
Pin172 XCLKEN* Enable External video clock (Genlock)
Pin173 XCLK External video clock (Genlock)
Pin174 EXT_VIDEO* Disable internal video interfaces
Pin175 DGND
Pin176 VCC
Pin177 AGND
Pin178 +12
Pin179 LEFT_EXT External Left sound
Pin180 LEFT Left sound
Pin181 RIGHT_EXT External Right sound
Pin182 RIGHT Right sound
NOTE: Signals with a _EXT suffix are intended for the CD32 FMV module.
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